oqs_sys
0.10.0+liboqs-0.12.0
In oqs_
sys::
common
Enums
OQS_CPU_EXT
OQS_STATUS
Constants
OQS_BUILD_ONLY_LIB
OQS_COMPILE_BUILD_TARGET
OQS_ENABLE_KEM_BIKE
OQS_ENABLE_KEM_CLASSIC_MCELIECE
OQS_ENABLE_KEM_FRODOKEM
OQS_ENABLE_KEM_HQC
OQS_ENABLE_KEM_KYBER
OQS_ENABLE_KEM_ML_KEM
OQS_ENABLE_KEM_NTRUPRIME
OQS_ENABLE_KEM_bike_l1
OQS_ENABLE_KEM_bike_l3
OQS_ENABLE_KEM_bike_l5
OQS_ENABLE_KEM_classic_mceliece_348864
OQS_ENABLE_KEM_classic_mceliece_348864_avx2
OQS_ENABLE_KEM_classic_mceliece_348864f
OQS_ENABLE_KEM_classic_mceliece_348864f_avx2
OQS_ENABLE_KEM_classic_mceliece_460896
OQS_ENABLE_KEM_classic_mceliece_460896_avx2
OQS_ENABLE_KEM_classic_mceliece_460896f
OQS_ENABLE_KEM_classic_mceliece_460896f_avx2
OQS_ENABLE_KEM_classic_mceliece_6688128
OQS_ENABLE_KEM_classic_mceliece_6688128_avx2
OQS_ENABLE_KEM_classic_mceliece_6688128f
OQS_ENABLE_KEM_classic_mceliece_6688128f_avx2
OQS_ENABLE_KEM_classic_mceliece_6960119
OQS_ENABLE_KEM_classic_mceliece_6960119_avx2
OQS_ENABLE_KEM_classic_mceliece_6960119f
OQS_ENABLE_KEM_classic_mceliece_6960119f_avx2
OQS_ENABLE_KEM_classic_mceliece_8192128
OQS_ENABLE_KEM_classic_mceliece_8192128_avx2
OQS_ENABLE_KEM_classic_mceliece_8192128f
OQS_ENABLE_KEM_classic_mceliece_8192128f_avx2
OQS_ENABLE_KEM_frodokem_1344_aes
OQS_ENABLE_KEM_frodokem_1344_shake
OQS_ENABLE_KEM_frodokem_640_aes
OQS_ENABLE_KEM_frodokem_640_shake
OQS_ENABLE_KEM_frodokem_976_aes
OQS_ENABLE_KEM_frodokem_976_shake
OQS_ENABLE_KEM_hqc_128
OQS_ENABLE_KEM_hqc_192
OQS_ENABLE_KEM_hqc_256
OQS_ENABLE_KEM_kyber_1024
OQS_ENABLE_KEM_kyber_1024_avx2
OQS_ENABLE_KEM_kyber_512
OQS_ENABLE_KEM_kyber_512_avx2
OQS_ENABLE_KEM_kyber_768
OQS_ENABLE_KEM_kyber_768_avx2
OQS_ENABLE_KEM_ml_kem_1024
OQS_ENABLE_KEM_ml_kem_1024_avx2
OQS_ENABLE_KEM_ml_kem_512
OQS_ENABLE_KEM_ml_kem_512_avx2
OQS_ENABLE_KEM_ml_kem_768
OQS_ENABLE_KEM_ml_kem_768_avx2
OQS_ENABLE_KEM_ntruprime_sntrup761
OQS_ENABLE_KEM_ntruprime_sntrup761_avx2
OQS_ENABLE_SHA3_xkcp_low_avx2
OQS_ENABLE_SIG_CROSS
OQS_ENABLE_SIG_DILITHIUM
OQS_ENABLE_SIG_FALCON
OQS_ENABLE_SIG_MAYO
OQS_ENABLE_SIG_ML_DSA
OQS_ENABLE_SIG_SPHINCS
OQS_ENABLE_SIG_cross_rsdp_128_balanced
OQS_ENABLE_SIG_cross_rsdp_128_balanced_avx2
OQS_ENABLE_SIG_cross_rsdp_128_fast
OQS_ENABLE_SIG_cross_rsdp_128_fast_avx2
OQS_ENABLE_SIG_cross_rsdp_128_small
OQS_ENABLE_SIG_cross_rsdp_128_small_avx2
OQS_ENABLE_SIG_cross_rsdp_192_balanced
OQS_ENABLE_SIG_cross_rsdp_192_balanced_avx2
OQS_ENABLE_SIG_cross_rsdp_192_fast
OQS_ENABLE_SIG_cross_rsdp_192_fast_avx2
OQS_ENABLE_SIG_cross_rsdp_192_small
OQS_ENABLE_SIG_cross_rsdp_192_small_avx2
OQS_ENABLE_SIG_cross_rsdp_256_balanced
OQS_ENABLE_SIG_cross_rsdp_256_balanced_avx2
OQS_ENABLE_SIG_cross_rsdp_256_fast
OQS_ENABLE_SIG_cross_rsdp_256_fast_avx2
OQS_ENABLE_SIG_cross_rsdp_256_small
OQS_ENABLE_SIG_cross_rsdp_256_small_avx2
OQS_ENABLE_SIG_cross_rsdpg_128_balanced
OQS_ENABLE_SIG_cross_rsdpg_128_balanced_avx2
OQS_ENABLE_SIG_cross_rsdpg_128_fast
OQS_ENABLE_SIG_cross_rsdpg_128_fast_avx2
OQS_ENABLE_SIG_cross_rsdpg_128_small
OQS_ENABLE_SIG_cross_rsdpg_128_small_avx2
OQS_ENABLE_SIG_cross_rsdpg_192_balanced
OQS_ENABLE_SIG_cross_rsdpg_192_balanced_avx2
OQS_ENABLE_SIG_cross_rsdpg_192_fast
OQS_ENABLE_SIG_cross_rsdpg_192_fast_avx2
OQS_ENABLE_SIG_cross_rsdpg_192_small
OQS_ENABLE_SIG_cross_rsdpg_192_small_avx2
OQS_ENABLE_SIG_cross_rsdpg_256_balanced
OQS_ENABLE_SIG_cross_rsdpg_256_balanced_avx2
OQS_ENABLE_SIG_cross_rsdpg_256_fast
OQS_ENABLE_SIG_cross_rsdpg_256_fast_avx2
OQS_ENABLE_SIG_cross_rsdpg_256_small
OQS_ENABLE_SIG_cross_rsdpg_256_small_avx2
OQS_ENABLE_SIG_dilithium_2
OQS_ENABLE_SIG_dilithium_2_avx2
OQS_ENABLE_SIG_dilithium_3
OQS_ENABLE_SIG_dilithium_3_avx2
OQS_ENABLE_SIG_dilithium_5
OQS_ENABLE_SIG_dilithium_5_avx2
OQS_ENABLE_SIG_falcon_1024
OQS_ENABLE_SIG_falcon_1024_avx2
OQS_ENABLE_SIG_falcon_512
OQS_ENABLE_SIG_falcon_512_avx2
OQS_ENABLE_SIG_falcon_padded_1024
OQS_ENABLE_SIG_falcon_padded_1024_avx2
OQS_ENABLE_SIG_falcon_padded_512
OQS_ENABLE_SIG_falcon_padded_512_avx2
OQS_ENABLE_SIG_mayo_1
OQS_ENABLE_SIG_mayo_1_avx2
OQS_ENABLE_SIG_mayo_2
OQS_ENABLE_SIG_mayo_2_avx2
OQS_ENABLE_SIG_mayo_3
OQS_ENABLE_SIG_mayo_3_avx2
OQS_ENABLE_SIG_mayo_5
OQS_ENABLE_SIG_mayo_5_avx2
OQS_ENABLE_SIG_ml_dsa_44
OQS_ENABLE_SIG_ml_dsa_44_avx2
OQS_ENABLE_SIG_ml_dsa_65
OQS_ENABLE_SIG_ml_dsa_65_avx2
OQS_ENABLE_SIG_ml_dsa_87
OQS_ENABLE_SIG_ml_dsa_87_avx2
OQS_ENABLE_SIG_sphincs_sha2_128f_simple
OQS_ENABLE_SIG_sphincs_sha2_128f_simple_avx2
OQS_ENABLE_SIG_sphincs_sha2_128s_simple
OQS_ENABLE_SIG_sphincs_sha2_128s_simple_avx2
OQS_ENABLE_SIG_sphincs_sha2_192f_simple
OQS_ENABLE_SIG_sphincs_sha2_192f_simple_avx2
OQS_ENABLE_SIG_sphincs_sha2_192s_simple
OQS_ENABLE_SIG_sphincs_sha2_192s_simple_avx2
OQS_ENABLE_SIG_sphincs_sha2_256f_simple
OQS_ENABLE_SIG_sphincs_sha2_256f_simple_avx2
OQS_ENABLE_SIG_sphincs_sha2_256s_simple
OQS_ENABLE_SIG_sphincs_sha2_256s_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_128f_simple
OQS_ENABLE_SIG_sphincs_shake_128f_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_128s_simple
OQS_ENABLE_SIG_sphincs_shake_128s_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_192f_simple
OQS_ENABLE_SIG_sphincs_shake_192f_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_192s_simple
OQS_ENABLE_SIG_sphincs_shake_192s_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_256f_simple
OQS_ENABLE_SIG_sphincs_shake_256f_simple_avx2
OQS_ENABLE_SIG_sphincs_shake_256s_simple
OQS_ENABLE_SIG_sphincs_shake_256s_simple_avx2
OQS_LIBJADE_BUILD
OQS_OPT_TARGET
OQS_USE_ADX_INSTRUCTIONS
OQS_USE_AES_INSTRUCTIONS
OQS_USE_AVX2_INSTRUCTIONS
OQS_USE_AVX_INSTRUCTIONS
OQS_USE_BMI1_INSTRUCTIONS
OQS_USE_BMI2_INSTRUCTIONS
OQS_USE_OPENSSL
OQS_USE_PCLMULQDQ_INSTRUCTIONS
OQS_USE_POPCNT_INSTRUCTIONS
OQS_USE_PTHREADS
OQS_USE_SHA2_OPENSSL
OQS_USE_SSE2_INSTRUCTIONS
OQS_USE_SSE3_INSTRUCTIONS
OQS_USE_SSE_INSTRUCTIONS
OQS_USE_VPCLMULQDQ_INSTRUCTIONS
OQS_VERSION_MAJOR
OQS_VERSION_MINOR
OQS_VERSION_PATCH
OQS_VERSION_TEXT
Functions
OQS_CPU_has_extension
OQS_MEM_aligned_alloc
OQS_MEM_aligned_free
OQS_MEM_cleanse
OQS_MEM_insecure_free
OQS_MEM_secure_bcmp
OQS_MEM_secure_free
OQS_destroy
OQS_init
OQS_thread_stop
OQS_version
oqs_sys
::
common
Constant
OQS_VERSION_TEXT
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source
pub const OQS_VERSION_TEXT: &[
u8
;
7
] = b"0.12.0\0";