Enums§
- OQS_
CPU_ EXT - CPU runtime detection flags
- OQS_
STATUS - Represents return values from functions.
Constants§
- OQS_
BUILD_ ONLY_ LIB - OQS_
COMPILE_ BUILD_ TARGET - OQS_
ENABLE_ KEM_ BIKE - OQS_
ENABLE_ KEM_ CLASSIC_ MCELIECE - OQS_
ENABLE_ KEM_ FRODOKEM - OQS_
ENABLE_ KEM_ HQC - OQS_
ENABLE_ KEM_ KYBER - OQS_
ENABLE_ KEM_ ML_ KEM - OQS_
ENABLE_ KEM_ NTRUPRIME - OQS_
ENABLE_ KEM_ bike_ l1 - OQS_
ENABLE_ KEM_ bike_ l3 - OQS_
ENABLE_ KEM_ bike_ l5 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 348864 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 460896 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 348864_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 348864f - OQS_
ENABLE_ KEM_ classic_ mceliece_ 348864f_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 460896_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 460896f - OQS_
ENABLE_ KEM_ classic_ mceliece_ 460896f_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6688128 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6960119 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 8192128 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6688128_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6688128f - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6688128f_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6960119_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6960119f - OQS_
ENABLE_ KEM_ classic_ mceliece_ 6960119f_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 8192128_ avx2 - OQS_
ENABLE_ KEM_ classic_ mceliece_ 8192128f - OQS_
ENABLE_ KEM_ classic_ mceliece_ 8192128f_ avx2 - OQS_
ENABLE_ KEM_ frodokem_ 640_ aes - OQS_
ENABLE_ KEM_ frodokem_ 640_ shake - OQS_
ENABLE_ KEM_ frodokem_ 976_ aes - OQS_
ENABLE_ KEM_ frodokem_ 976_ shake - OQS_
ENABLE_ KEM_ frodokem_ 1344_ aes - OQS_
ENABLE_ KEM_ frodokem_ 1344_ shake - OQS_
ENABLE_ KEM_ hqc_ 128 - OQS_
ENABLE_ KEM_ hqc_ 192 - OQS_
ENABLE_ KEM_ hqc_ 256 - OQS_
ENABLE_ KEM_ kyber_ 512 - OQS_
ENABLE_ KEM_ kyber_ 768 - OQS_
ENABLE_ KEM_ kyber_ 512_ avx2 - OQS_
ENABLE_ KEM_ kyber_ 768_ avx2 - OQS_
ENABLE_ KEM_ kyber_ 1024 - OQS_
ENABLE_ KEM_ kyber_ 1024_ avx2 - OQS_
ENABLE_ KEM_ ml_ kem_ 512 - OQS_
ENABLE_ KEM_ ml_ kem_ 768 - OQS_
ENABLE_ KEM_ ml_ kem_ 512_ x86_ 64 - OQS_
ENABLE_ KEM_ ml_ kem_ 768_ x86_ 64 - OQS_
ENABLE_ KEM_ ml_ kem_ 1024 - OQS_
ENABLE_ KEM_ ml_ kem_ 1024_ x86_ 64 - OQS_
ENABLE_ KEM_ ntruprime_ sntrup761 - OQS_
ENABLE_ KEM_ ntruprime_ sntrup761_ avx2 - OQS_
ENABLE_ SHA3_ xkcp_ low_ avx2 - OQS_
ENABLE_ SIG_ CROSS - OQS_
ENABLE_ SIG_ DILITHIUM - OQS_
ENABLE_ SIG_ FALCON - OQS_
ENABLE_ SIG_ MAYO - OQS_
ENABLE_ SIG_ ML_ DSA - OQS_
ENABLE_ SIG_ SPHINCS - OQS_
ENABLE_ SIG_ UOV - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ fast - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ small - OQS_
ENABLE_ SIG_ cross_ rsdp_ 128_ small_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ fast - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ small - OQS_
ENABLE_ SIG_ cross_ rsdp_ 192_ small_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ fast - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ small - OQS_
ENABLE_ SIG_ cross_ rsdp_ 256_ small_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ fast - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ small - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 128_ small_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ fast - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ small - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 192_ small_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ balanced - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ balanced_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ fast - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ fast_ avx2 - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ small - OQS_
ENABLE_ SIG_ cross_ rsdpg_ 256_ small_ avx2 - OQS_
ENABLE_ SIG_ dilithium_ 2 - OQS_
ENABLE_ SIG_ dilithium_ 3 - OQS_
ENABLE_ SIG_ dilithium_ 5 - OQS_
ENABLE_ SIG_ dilithium_ 2_ avx2 - OQS_
ENABLE_ SIG_ dilithium_ 3_ avx2 - OQS_
ENABLE_ SIG_ dilithium_ 5_ avx2 - OQS_
ENABLE_ SIG_ falcon_ 512 - OQS_
ENABLE_ SIG_ falcon_ 512_ avx2 - OQS_
ENABLE_ SIG_ falcon_ 1024 - OQS_
ENABLE_ SIG_ falcon_ 1024_ avx2 - OQS_
ENABLE_ SIG_ falcon_ padded_ 512 - OQS_
ENABLE_ SIG_ falcon_ padded_ 512_ avx2 - OQS_
ENABLE_ SIG_ falcon_ padded_ 1024 - OQS_
ENABLE_ SIG_ falcon_ padded_ 1024_ avx2 - OQS_
ENABLE_ SIG_ mayo_ 1 - OQS_
ENABLE_ SIG_ mayo_ 2 - OQS_
ENABLE_ SIG_ mayo_ 3 - OQS_
ENABLE_ SIG_ mayo_ 5 - OQS_
ENABLE_ SIG_ mayo_ 1_ avx2 - OQS_
ENABLE_ SIG_ mayo_ 2_ avx2 - OQS_
ENABLE_ SIG_ mayo_ 3_ avx2 - OQS_
ENABLE_ SIG_ mayo_ 5_ avx2 - OQS_
ENABLE_ SIG_ ml_ dsa_ 44 - OQS_
ENABLE_ SIG_ ml_ dsa_ 65 - OQS_
ENABLE_ SIG_ ml_ dsa_ 87 - OQS_
ENABLE_ SIG_ ml_ dsa_ 44_ avx2 - OQS_
ENABLE_ SIG_ ml_ dsa_ 65_ avx2 - OQS_
ENABLE_ SIG_ ml_ dsa_ 87_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 128f_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 128f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 128s_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 128s_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 192f_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 192f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 192s_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 192s_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 256f_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 256f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 256s_ simple - OQS_
ENABLE_ SIG_ sphincs_ sha2_ 256s_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 128f_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 128f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 128s_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 128s_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 192f_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 192f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 192s_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 192s_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 256f_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 256f_ simple_ avx2 - OQS_
ENABLE_ SIG_ sphincs_ shake_ 256s_ simple - OQS_
ENABLE_ SIG_ sphincs_ shake_ 256s_ simple_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ III - OQS_
ENABLE_ SIG_ uov_ ov_ III_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ III_ pkc - OQS_
ENABLE_ SIG_ uov_ ov_ III_ pkc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ III_ pkc_ skc - OQS_
ENABLE_ SIG_ uov_ ov_ III_ pkc_ skc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Ip - OQS_
ENABLE_ SIG_ uov_ ov_ Ip_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Ip_ pkc - OQS_
ENABLE_ SIG_ uov_ ov_ Ip_ pkc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Ip_ pkc_ skc - OQS_
ENABLE_ SIG_ uov_ ov_ Ip_ pkc_ skc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Is - OQS_
ENABLE_ SIG_ uov_ ov_ Is_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Is_ pkc - OQS_
ENABLE_ SIG_ uov_ ov_ Is_ pkc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ Is_ pkc_ skc - OQS_
ENABLE_ SIG_ uov_ ov_ Is_ pkc_ skc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ V - OQS_
ENABLE_ SIG_ uov_ ov_ V_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ V_ pkc - OQS_
ENABLE_ SIG_ uov_ ov_ V_ pkc_ avx2 - OQS_
ENABLE_ SIG_ uov_ ov_ V_ pkc_ skc - OQS_
ENABLE_ SIG_ uov_ ov_ V_ pkc_ skc_ avx2 - OQS_
LIBJADE_ BUILD - OQS_
OPT_ TARGET - OQS_
USE_ ADX_ INSTRUCTIONS - OQS_
USE_ AES_ INSTRUCTIONS - OQS_
USE_ AVX2_ INSTRUCTIONS - OQS_
USE_ AVX_ INSTRUCTIONS - OQS_
USE_ BMI1_ INSTRUCTIONS - OQS_
USE_ BMI2_ INSTRUCTIONS - OQS_
USE_ CUPQC - OQS_
USE_ OPENSSL - OQS_
USE_ PCLMULQDQ_ INSTRUCTIONS - OQS_
USE_ POPCNT_ INSTRUCTIONS - OQS_
USE_ PTHREADS - OQS_
USE_ SHA2_ OPENSSL - OQS_
USE_ SSE2_ INSTRUCTIONS - OQS_
USE_ SSE3_ INSTRUCTIONS - OQS_
USE_ SSE_ INSTRUCTIONS - OQS_
USE_ VPCLMULQDQ_ INSTRUCTIONS - OQS_
VERSION_ MAJOR - OQS_
VERSION_ MINOR - OQS_
VERSION_ PATCH - OQS_
VERSION_ TEXT
Functions§
- OQS_
CPU_ ⚠has_ extension - Checks if the CPU supports a given extension
- OQS_
MEM_ ⚠aligned_ alloc - Internal implementation of C11 aligned_alloc to work around compiler quirks.
- OQS_
MEM_ ⚠aligned_ free - Free memory allocated with OQS_MEM_aligned_alloc.
- OQS_
MEM_ ⚠calloc - Allocates memory for an array of elements of a given size. @param num_elements The number of elements to allocate. @param element_size The size of each element in bytes. @return A pointer to the allocated memory.
- OQS_
MEM_ ⚠cleanse - Zeros out
lenbytes of memory starting atptr. - OQS_
MEM_ ⚠insecure_ free - Frees
ptr. - OQS_
MEM_ ⚠malloc - Allocates memory of a given size. @param size The size of the memory to be allocated in bytes. @return A pointer to the allocated memory.
- OQS_
MEM_ ⚠secure_ bcmp - Constant time comparison of byte sequences
aandbof lengthlen. Returns 0 if the byte sequences are equal or iflen=0. Returns 1 otherwise. - OQS_
MEM_ ⚠secure_ free - Zeros out
lenbytes of memory starting atptr, then freesptr. - OQS_
MEM_ ⚠strdup - Duplicates a string. @param str The string to be duplicated. @return A pointer to the newly allocated string.
- OQS_
destroy ⚠ - This function frees prefetched OpenSSL objects
- OQS_
init ⚠ - This currently sets the values in the OQS_CPU_EXTENSIONS and prefetches the OpenSSL objects if necessary.
- OQS_
thread_ ⚠stop - This function stops OpenSSL threads, which allows resources to be cleaned up in the correct order. @note When liboqs is used in a multithreaded application, each thread should call this function prior to stopping.
- OQS_
version ⚠ - Return library version string.